False-Path Removal Using Delay Fault Simulation
نویسندگان
چکیده
Some false paths are caused by redundant stuck-at faults. Removal of those stuck-at faults automatically eliminates such false paths f r o m the circuit. However, there are other false paths that are not associated with any redundant stuck-at fault. All links of such a false path are shared with other testable paths. W e focus o n the elimination of this type of false paths. W e use a nonenumerative path delay fault simulator, which duplicates selected gates to separate the detected and undetected path delay faults. The expanded circuit m a y contain new redundant stuck-at faults, corresponding t o those undetected paths that are false. This happens because in the expanded circuit some new links have only false paths passing through them. Such links become the sites f o r redundant stuck-at faults. Removal of these redundant faults eliminates false paths. The quality of the result m a y depend o n the coverage of testable paths by the vectors that are simulated. Since a non-enumerative path delay simulation and a n implication-based redundancy removal technique are used, the present procedure of false-path elimination can be applied to very large circuits.
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